# Data Center GPU Max 1550

> Intel · Xe-HPC

Discontinued

Canonical: https://gpuninja.com/chips/data-center-gpu-max-1550
Data as of: 2026-10-11T10:33:30Z
Path: Home › GPU chips

> **Discontinued.** Discontinued on 1 Jan 2026. This page is a preserved snapshot of the last recorded specs, prices and benchmark results.

- Specs verified: between 11 Oct 2026, 09:14 UTC and 11 Oct 2026, 10:33 UTC

## Specifications

- Vendor: Intel (Verified · source intel.com · retrieved 11 Oct 2026, 08:17 UTC · checked 11 Oct 2026, 09:14 UTC)
- Architecture: Xe-HPC (Verified · source dgpu-docs.intel.com · retrieved 11 Oct 2026, 08:20 UTC · checked 11 Oct 2026, 09:14 UTC)
- Die: Ponte Vecchio (Verified · source intel.com · retrieved 11 Oct 2026, 08:17 UTC · checked 11 Oct 2026, 09:14 UTC)
- Process: TSMC N5 (Verified · source en.wikipedia.org · retrieved 11 Oct 2026, 08:18 UTC · checked 11 Oct 2026, 09:14 UTC)
- Shader cores: 16,384 (Verified · source en.wikipedia.org · retrieved 11 Oct 2026, 08:18 UTC · checked 11 Oct 2026, 09:14 UTC)
- Tensor cores: 1,024 (Verified · source intel.com · retrieved 11 Oct 2026, 08:17 UTC · checked 11 Oct 2026, 09:14 UTC)
- RT cores: 128 (Verified · source intel.com · retrieved 11 Oct 2026, 08:17 UTC · checked 11 Oct 2026, 09:14 UTC)
- Memory bus: 8,192-bit (Verified · source en.wikipedia.org · retrieved 11 Oct 2026, 08:18 UTC · checked 11 Oct 2026, 09:14 UTC)
- Max VRAM: 128 GB (Verified · source intel.com · retrieved 11 Oct 2026, 08:17 UTC · checked 11 Oct 2026, 09:14 UTC)
- Reference boost clock: 1,600 MHz (Verified · source intel.com · retrieved 11 Oct 2026, 08:17 UTC · checked 11 Oct 2026, 09:14 UTC)
- Reference TDP: 600 W (Verified · source intel.com · retrieved 11 Oct 2026, 08:17 UTC · checked 11 Oct 2026, 09:14 UTC)
- Host interface: Not recorded
- Launch MSRP: No public MSRP
- Launch date: 10 Jan 2023 (Verified · source en.wikipedia.org · retrieved 11 Oct 2026, 08:18 UTC · checked 11 Oct 2026, 09:14 UTC)
- Segment: Data center (Verified · source intel.com · retrieved 11 Oct 2026, 08:17 UTC · checked 11 Oct 2026, 09:14 UTC)
- PCI IDs: 8086:0bd5, 8086:0bd6 (Verified · source raw.githubusercontent.com · retrieved 11 Oct 2026, 08:17 UTC · checked 11 Oct 2026, 09:14 UTC)
- Status: Discontinued on 1 Jan 2026 (Verified · source intel.com · retrieved 11 Oct 2026, 08:17 UTC · checked 11 Oct 2026, 09:14 UTC)

## Performance

- Memory bandwidth: 3,276.8 GB/s (Verified · source intel.com · retrieved 11 Oct 2026, 09:48 UTC · checked 11 Oct 2026, 10:33 UTC)
- FP32 compute: 52.43 TFLOPS (Unverified · source intel.com · retrieved 11 Oct 2026, 09:48 UTC · checked 11 Oct 2026, 10:33 UTC)
- FP16 compute: 838.86 TFLOPS (Unverified · source intel.com · retrieved 11 Oct 2026, 09:48 UTC · checked 11 Oct 2026, 10:33 UTC)
- BF16 compute: 838.86 TFLOPS (Unverified · source intel.com · retrieved 11 Oct 2026, 09:48 UTC · checked 11 Oct 2026, 10:33 UTC)
- FP8 compute: Not supported
- FP4 compute: Not supported
- INT8 compute: 1,677.72 TOPS (Unverified · source intel.com · retrieved 11 Oct 2026, 09:48 UTC · checked 11 Oct 2026, 10:33 UTC)

## Boards built on this chip

Board, Chip, VRAM, TDP, Length, Slots, Price, Stock

No boards recorded for this chip.

## Benchmarks

No benchmark results recorded.

## Sources

- https://www.intel.com/content/www/us/en/products/sku/232873/intel-data-center-gpu-max-1550/specifications.html — Vendor, Die, Tensor cores, RT cores, Max VRAM, Reference boost clock, Reference TDP, Segment, Status, Memory bandwidth; last verified 11 Oct 2026, 10:33 UTC
- https://dgpu-docs.intel.com/overview/supported-hardware/i915-driver-gpus.html — Architecture; last verified 11 Oct 2026, 09:14 UTC
- https://en.wikipedia.org/wiki/Intel_Xe — Process, Shader cores, Memory bus, Launch date; last verified 11 Oct 2026, 09:14 UTC
- https://raw.githubusercontent.com/pciutils/pciids/master/pci.ids — PCI IDs; last verified 11 Oct 2026, 09:14 UTC
- https://www.intel.com/content/www/us/en/docs/oneapi/optimization-guide-gpu/2025-0/intel-xe-gpu-architecture.html — FP32 compute, FP16 compute, BF16 compute, INT8 compute; last verified 11 Oct 2026, 10:33 UTC