# Radeon Pro V520

> AMD · RDNA

Canonical: https://gpuninja.com/chips/radeon-pro-v520
Data as of: 2026-10-11T10:24:02Z
Path: Home › GPU chips
- Specs verified: between 11 Oct 2026, 09:08 UTC and 11 Oct 2026, 10:24 UTC

## Specifications

- Vendor: AMD (Verified · source amd.com · retrieved 11 Oct 2026, 08:10 UTC · checked 11 Oct 2026, 09:08 UTC)
- Architecture: RDNA (Verified · source amd.com · retrieved 11 Oct 2026, 08:10 UTC · checked 11 Oct 2026, 09:08 UTC)
- Die: Navi 12 (Verified · source pci-ids.ucw.cz · retrieved 11 Oct 2026, 07:48 UTC · checked 11 Oct 2026, 09:08 UTC)
- Process: TSMC N7 (Verified · source en.wikipedia.org · retrieved 11 Oct 2026, 07:48 UTC · checked 11 Oct 2026, 09:08 UTC)
- Shader cores: 2,304 (Verified · source amd.com · retrieved 11 Oct 2026, 08:10 UTC · checked 11 Oct 2026, 09:08 UTC)
- Tensor cores: None
- RT cores: None
- Memory bus: 2,048-bit (Verified · source amd.com · retrieved 11 Oct 2026, 08:10 UTC · checked 11 Oct 2026, 09:08 UTC)
- Max VRAM: 8 GB (Verified · source amd.com · retrieved 11 Oct 2026, 08:10 UTC · checked 11 Oct 2026, 09:08 UTC)
- Reference boost clock: 1,600 MHz (Verified · source amd.com · retrieved 11 Oct 2026, 08:10 UTC · checked 11 Oct 2026, 09:08 UTC)
- Reference TDP: 225 W (Verified · source amd.com · retrieved 11 Oct 2026, 08:10 UTC · checked 11 Oct 2026, 09:08 UTC)
- Host interface: PCIe 4.0 x16 (Verified · source amd.com · retrieved 11 Oct 2026, 09:34 UTC · checked 11 Oct 2026, 10:24 UTC)
- Launch MSRP: No public MSRP
- Launch date: 10 Jan 2020 (Verified · source amd.com · retrieved 11 Oct 2026, 08:10 UTC · checked 11 Oct 2026, 09:08 UTC)
- Segment: Data center (Verified · source amd.com · retrieved 11 Oct 2026, 08:10 UTC · checked 11 Oct 2026, 09:08 UTC)
- PCI IDs: 1002:7360, 1002:7362 (Verified · source gitlab.freedesktop.org · retrieved 11 Oct 2026, 09:05 UTC · checked 11 Oct 2026, 09:08 UTC)
- Status: Active (Verified · source amd.com · retrieved 11 Oct 2026, 08:10 UTC · checked 11 Oct 2026, 09:08 UTC)

## Performance

- Memory bandwidth: 512 GB/s (Verified · source amd.com · retrieved 11 Oct 2026, 09:34 UTC · checked 11 Oct 2026, 10:24 UTC)
- FP32 compute: 7.37 TFLOPS (Verified · source en.wikipedia.org · retrieved 11 Oct 2026, 09:35 UTC · checked 11 Oct 2026, 10:24 UTC)
- FP16 compute: 14.75 TFLOPS (Verified · source amd.com · retrieved 11 Oct 2026, 09:34 UTC · checked 11 Oct 2026, 10:24 UTC)
- BF16 compute: Not supported
- FP8 compute: Not supported
- FP4 compute: Not supported
- INT8 compute: 29.49 TOPS (Unverified · source igorslab.de · retrieved 11 Oct 2026, 10:24 UTC)

## Boards built on this chip

Board, Chip, VRAM, TDP, Length, Slots, Price, Stock

No boards recorded for this chip.

## Benchmarks

No benchmark results recorded.

## Sources

- https://www.amd.com/en/products/accelerators/radeon-pro/amd-radeon-pro-v520.html — Vendor, Architecture, Shader cores, Memory bus, Max VRAM, Reference boost clock, Reference TDP, Host interface, Launch date, Segment, Memory bandwidth, FP16 compute; last verified 11 Oct 2026, 10:24 UTC
- https://pci-ids.ucw.cz/read/PC/1002/7362 — Die; last verified 11 Oct 2026, 09:08 UTC
- https://en.wikipedia.org/wiki/List_of_AMD_graphics_processing_units#Radeon_Pro_V_series — Process; last verified 11 Oct 2026, 09:08 UTC
- https://gitlab.freedesktop.org/api/v4/projects/mesa%2Fdrm/repository/files/data%2Famdgpu.ids/raw?ref=main — PCI IDs; last verified 11 Oct 2026, 09:08 UTC
- https://www.amd.com/en/products/accelerators/radeon-pro.html — Status; last verified 11 Oct 2026, 09:08 UTC
- https://en.wikipedia.org/wiki/List_of_AMD_graphics_processing_units — FP32 compute; last verified 11 Oct 2026, 10:24 UTC
- https://www.igorslab.de/wp-content/uploads/2019/08/rdna-whitepaper.pdf — INT8 compute; last verified 11 Oct 2026, 10:24 UTC